The present invention relates generally to voltage controlled oscillators (VCOs) for phase lock loop frequency synthesizers, and in particular to calibrating and tuning a VCO, and including operating point control for the VCO.
Conventional phase-locked loops (PLLs) are used in prior art circuits to synthesize local oscillator frequencies used in radio receivers. The most common type of PLL uses a VCO that depends on a varactor for tuning. But inexpensive varactor diodes cannot be used in PLLs that need to be tuned over very large frequency ranges.
A typical prior-art VCO is shown in FIG. 1 in a phase locked loop configuration and given reference numeral 100. The VCO constant denoted Kv is the slope of the frequency vs. control voltage curve, and when an attempt is made to tune a varactor controlled VCO, the required VCO constant is too large or the capacitance variation required becomes unachievable and the PLL has trouble locking. Such circuits, when they do lock, are very sensitive to digital noise, because a relatively small noise voltage is translated into a relatively large frequency perturbation. For example, in a 1.8-volt system needing a one-gigahertz tuning range, a VCO constant of 1 G Hz/volt would be far too large to be practical for use in a PLL with a loop bandwidth consistent with practical 802.11a radio operation.
In general, a smaller VCO constant will result in reduced phase noise. To keep the VCO constant relatively low, yet achieve a large tuning range, one prior art tuning method includes switching in and out fixed capacitors and using the varactors to tune between the frequencies of only the fixed capacitors. A one gigaHertz tuning range, for example, would be implemented in ten 100 MHz subranges, with the VCO constant of 100 MHz/volt, achieving a twenty dB reduction.
Unfortunately, with mass-produced semiconductor devices such switched fixed capacitors vary with manufacturing process spread and with operating temperatures. So a calibration method and circuit are needed that can reduce the frequency uncertainties that would otherwise be introduced into PLL and VCO applications. Better yet, a built-in calibration method could help in obtaining a longer, more reliable product life.
It is desired to have an inexpensive VCO for a mass produced device, for example using CMOS technology. It is very difficult to make good quality VCOs in CMOS; the inductor Q's, for example, are very poor. Therefore it is important that all other factors that contribute to phase noise are significantly reduced, the VCO constant being one of them. The VCO constant affects the loop dynamics of a PLL that uses the VCO, such as the phase margin and loop bandwidth of the PLL.
One desirable property of a VCO is that the VCO constant not only be kept reasonably low, but also stable and known.
FIG. 2 shows the frequency vs. control voltage curve for a fictional “ideal” VCO. The curve is a straight line over a large frequency range, so that Kv is constant. FIG. 2 also shows what a frequency vs. control voltage curve looks like for a fictional prior-art CMOS VCO with no operating point control. The curve is not linear, but “S-shaped.” The slope of the curve varies with frequency, and such a variation is shown, by way of example, in FIG. 3. Furthermore, the frequency vs. control voltage curve itself varies with temperature, leading to drift in the free running frequency. Furthermore, the frequency vs. control voltage also varies from device to device, particularly when using inexpensive technology such as CMOS. Because of these and other effects, one cannot predict where the operating point, i.e., the point of the lock up of the PLL, will be.
Thus there is a need to provide a control mechanism to ensure that the operating point of the VCO is close to a desirable operating point.